200 lines
8.3 KiB
C
200 lines
8.3 KiB
C
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/**
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******************************************************************************
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* @file usb_conf.h
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* @author MCD Application Team
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* @version V3.4.0
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* @date 29-June-2012
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* @brief Custom HID demo configuration file
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __USB_CONF_H
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#define __USB_CONF_H
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/* Includes ------------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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/* External variables --------------------------------------------------------*/
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/*-------------------------------------------------------------*/
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/* EP_NUM */
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/* defines how many endpoints are used by the device */
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/*-------------------------------------------------------------*/
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#define EP_NUM (2)
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#ifndef STM32F10X_CL
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/*-------------------------------------------------------------*/
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/* -------------- Buffer Description Table -----------------*/
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/*-------------------------------------------------------------*/
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/* buffer table base address */
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/* buffer table base address */
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#define BTABLE_ADDRESS (0x00)
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/* EP0 */
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/* rx/tx buffer base address */
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#define ENDP0_RXADDR (0x18)
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#define ENDP0_TXADDR (0x58)
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/* EP1 */
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/* tx buffer base address */
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#define ENDP1_TXADDR (0x100)
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#define ENDP1_RXADDR (0x140)
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/*-------------------------------------------------------------*/
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/* ------------------- ISTR events -------------------------*/
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/*-------------------------------------------------------------*/
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/* IMR_MSK */
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/* mask defining which events has to be handled */
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/* by the device application software */
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#define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \
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| CNTR_ESOFM | CNTR_RESETM )
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#endif /* STM32F10X_CL */
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#ifdef STM32F10X_CL
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/*******************************************************************************
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* FIFO Size Configuration
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*
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* (i) Dedicated data FIFO SPRAM of 1.25 Kbytes = 1280 bytes = 320 32-bits words
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* available for the endpoints IN and OUT.
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* Device mode features:
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* -1 bidirectional CTRL EP 0
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* -3 IN EPs to support any kind of Bulk, Interrupt or Isochronous transfer
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* -3 OUT EPs to support any kind of Bulk, Interrupt or Isochronous transfer
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*
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* ii) Receive data FIFO size = RAM for setup packets +
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* OUT endpoint control information +
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* data OUT packets + miscellaneous
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* Space = ONE 32-bits words
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* --> RAM for setup packets = 4 * n + 6 space
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* (n is the nbr of CTRL EPs the device core supports)
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* --> OUT EP CTRL info = 1 space
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* (one space for status information written to the FIFO along with each
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* received packet)
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* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
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* (MINIMUM to receive packets)
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* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
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* (if high-bandwidth EP is enabled or multiple isochronous EPs)
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* --> miscellaneous = 1 space per OUT EP
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* (one space for transfer complete status information also pushed to the
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* FIFO with each endpoint's last packet)
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*
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* (iii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
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* that particular IN EP. More space allocated in the IN EP Tx FIFO results
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* in a better performance on the USB and can hide latencies on the AHB.
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*
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* (iv) TXn min size = 16 words. (n : Transmit FIFO index)
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* (v) When a TxFIFO is not used, the Configuration should be as follows:
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* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
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* --> Txm can use the space allocated for Txn.
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* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
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* --> Txn should be configured with the minimum space of 16 words
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* (vi) The FIFO is used optimally when used TxFIFOs are allocated in the top
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* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
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*******************************************************************************/
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#define RX_FIFO_SIZE 128
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#define TX0_FIFO_SIZE 64
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#define TX1_FIFO_SIZE 64
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#define TX2_FIFO_SIZE 16
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#define TX3_FIFO_SIZE 16
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/* OTGD-FS-DEVICE IP interrupts Enable definitions */
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/* Uncomment the define to enable the selected interrupt */
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//#define INTR_MODEMISMATCH
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#define INTR_SOFINTR
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#define INTR_RXSTSQLVL /* Mandatory */
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//#define INTR_NPTXFEMPTY
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//#define INTR_GINNAKEFF
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//#define INTR_GOUTNAKEFF
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//#define INTR_ERLYSUSPEND
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#define INTR_USBSUSPEND /* Mandatory */
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#define INTR_USBRESET /* Mandatory */
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#define INTR_ENUMDONE /* Mandatory */
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//#define INTR_ISOOUTDROP
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//#define INTR_EOPFRAME
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//#define INTR_EPMISMATCH
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#define INTR_INEPINTR /* Mandatory */
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#define INTR_OUTEPINTR /* Mandatory */
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//#define INTR_INCOMPLISOIN
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//#define INTR_INCOMPLISOOUT
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#define INTR_WKUPINTR /* Mandatory */
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/* OTGD-FS-DEVICE IP interrupts subroutines */
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/* Comment the define to enable the selected interrupt subroutine and replace it
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by user code */
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#define INTR_MODEMISMATCH_Callback NOP_Process
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#define INTR_SOFINTR_Callback NOP_Process
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#define INTR_RXSTSQLVL_Callback NOP_Process
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#define INTR_NPTXFEMPTY_Callback NOP_Process
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#define INTR_NPTXFEMPTY_Callback NOP_Process
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#define INTR_GINNAKEFF_Callback NOP_Process
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#define INTR_GOUTNAKEFF_Callback NOP_Process
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#define INTR_ERLYSUSPEND_Callback NOP_Process
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#define INTR_USBSUSPEND_Callback NOP_Process
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#define INTR_USBRESET_Callback NOP_Process
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#define INTR_ENUMDONE_Callback NOP_Process
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#define INTR_ISOOUTDROP_Callback NOP_Process
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#define INTR_EOPFRAME_Callback NOP_Process
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#define INTR_EPMISMATCH_Callback NOP_Process
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#define INTR_INEPINTR_Callback NOP_Process
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#define INTR_OUTEPINTR_Callback NOP_Process
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#define INTR_INCOMPLISOIN_Callback NOP_Process
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#define INTR_INCOMPLISOOUT_Callback NOP_Process
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#define INTR_WKUPINTR_Callback NOP_Process
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/* Isochronous data update */
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#define INTR_RXSTSQLVL_ISODU_Callback NOP_Process
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/* Isochronous transfer parameters */
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/* Size of a single Isochronous buffer (size of a single transfer) */
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#define ISOC_BUFFER_SZE 1
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/* Number of sub-buffers (number of single buffers/transfers), should be even */
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#define NUM_SUB_BUFFERS 2
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#endif /* STM32F10X_CL */
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/* CTR service routines */
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/* associated to defined endpoints */
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/* #define EP1_IN_Callback NOP_Process */
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#define EP2_IN_Callback NOP_Process
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#define EP3_IN_Callback NOP_Process
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#define EP4_IN_Callback NOP_Process
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#define EP5_IN_Callback NOP_Process
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#define EP6_IN_Callback NOP_Process
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#define EP7_IN_Callback NOP_Process
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//#define EP1_OUT_Callback NOP_Process
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#define EP2_OUT_Callback NOP_Process
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#define EP3_OUT_Callback NOP_Process
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#define EP4_OUT_Callback NOP_Process
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#define EP5_OUT_Callback NOP_Process
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#define EP6_OUT_Callback NOP_Process
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#define EP7_OUT_Callback NOP_Process
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#endif /*__USB_CONF_H*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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