564 lines
25 KiB
C
564 lines
25 KiB
C
#ifndef __ICM42688P_H__
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#define __ICM42688P_H__
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#include "spi.h"
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#include "gpio.h"
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#include "public_data.h"
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#include "communicate.h"
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#define SPI_CS_Enable() HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_RESET)
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#define SPI_CS_Disable() HAL_GPIO_WritePin(SPI2_CS_GPIO_Port, SPI2_CS_Pin, GPIO_PIN_SET)
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// expected value in UB0_REG_WHO_AM_I reg
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#define WHO_AM_I 0x47
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// Accesible from all user banks
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#define REG_BANK_SEL 0x76
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// User Bank 0
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#define UB0_REG_DEVICE_CONFIG 0x11
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// break
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#define UB0_REG_DRIVE_CONFIG 0x13
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#define UB0_REG_INT_CONFIG 0x14
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// break
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#define UB0_REG_FIFO_CONFIG 0x16
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// break
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#define UB0_REG_TEMP_DATA1 0x1D
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#define UB0_REG_TEMP_DATA0 0x1E
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#define UB0_REG_ACCEL_DATA_X1 0x1F
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#define UB0_REG_ACCEL_DATA_X0 0x20
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#define UB0_REG_ACCEL_DATA_Y1 0x21
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#define UB0_REG_ACCEL_DATA_Y0 0x22
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#define UB0_REG_ACCEL_DATA_Z1 0x23
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#define UB0_REG_ACCEL_DATA_Z0 0x24
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#define UB0_REG_GYRO_DATA_X1 0x25
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#define UB0_REG_GYRO_DATA_X0 0x26
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#define UB0_REG_GYRO_DATA_Y1 0x27
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#define UB0_REG_GYRO_DATA_Y0 0x28
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#define UB0_REG_GYRO_DATA_Z1 0x29
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#define UB0_REG_GYRO_DATA_Z0 0x2A
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#define UB0_REG_TMST_FSYNCH 0x2B
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#define UB0_REG_TMST_FSYNCL 0x2C
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#define UB0_REG_INT_STATUS 0x2D
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#define UB0_REG_FIFO_COUNTH 0x2E
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#define UB0_REG_FIFO_COUNTL 0x2F
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#define UB0_REG_FIFO_DATA 0x30
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#define UB0_REG_APEX_DATA0 0x31
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#define UB0_REG_APEX_DATA1 0x32
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#define UB0_REG_APEX_DATA2 0x33
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#define UB0_REG_APEX_DATA3 0x34
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#define UB0_REG_APEX_DATA4 0x35
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#define UB0_REG_APEX_DATA5 0x36
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#define UB0_REG_INT_STATUS2 0x37
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#define UB0_REG_INT_STATUS3 0x38
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// break
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#define UB0_REG_SIGNAL_PATH_RESET 0x4B
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#define UB0_REG_INTF_CONFIG0 0x4C
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#define UB0_REG_INTF_CONFIG1 0x4D
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#define UB0_REG_PWR_MGMT0 0x4E
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#define UB0_REG_GYRO_CONFIG0 0x4F
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#define UB0_REG_ACCEL_CONFIG0 0x50
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#define UB0_REG_GYRO_CONFIG1 0x51
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#define UB0_REG_GYRO_ACCEL_CONFIG0 0x52
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#define UB0_REG_ACCEL_CONFIG1 0x53
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#define UB0_REG_TMST_CONFIG 0x54
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// break
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#define UB0_REG_APEX_CONFIG0 0x56
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#define UB0_REG_SMD_CONFIG 0x57
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// break
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#define UB0_REG_FIFO_CONFIG1 0x5F
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#define UB0_REG_FIFO_CONFIG2 0x60
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#define UB0_REG_FIFO_CONFIG3 0x61
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#define UB0_REG_FSYNC_CONFIG 0x62
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#define UB0_REG_INT_CONFIG0 0x63
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#define UB0_REG_INT_CONFIG1 0x64
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#define UB0_REG_INT_SOURCE0 0x65
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#define UB0_REG_INT_SOURCE1 0x66
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// break
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#define UB0_REG_INT_SOURCE3 0x68
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#define UB0_REG_INT_SOURCE4 0x69
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// break
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#define UB0_REG_FIFO_LOST_PKT0 0x6C
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#define UB0_REG_FIFO_LOST_PKT1 0x6D
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// break
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#define UB0_REG_SELF_TEST_CONFIG 0x70
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// break
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#define UB0_REG_WHO_AM_I 0x75
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// User Bank 1
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#define UB1_REG_SENSOR_CONFIG0 0x03
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// break
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#define UB1_REG_GYRO_CONFIG_STATIC2 0x0B
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#define UB1_REG_GYRO_CONFIG_STATIC3 0x0C
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#define UB1_REG_GYRO_CONFIG_STATIC4 0x0D
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#define UB1_REG_GYRO_CONFIG_STATIC5 0x0E
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#define UB1_REG_GYRO_CONFIG_STATIC6 0x0F
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#define UB1_REG_GYRO_CONFIG_STATIC7 0x10
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#define UB1_REG_GYRO_CONFIG_STATIC8 0x11
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#define UB1_REG_GYRO_CONFIG_STATIC9 0x12
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#define UB1_REG_GYRO_CONFIG_STATIC10 0x13
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// break
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#define UB1_REG_XG_ST_DATA 0x5F
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#define UB1_REG_YG_ST_DATA 0x60
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#define UB1_REG_ZG_ST_DATA 0x61
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#define UB1_REG_TMSTVAL0 0x62
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#define UB1_REG_TMSTVAL1 0x63
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#define UB1_REG_TMSTVAL2 0x64
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// break
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#define UB1_REG_INTF_CONFIG4 0x7A
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#define UB1_REG_INTF_CONFIG5 0x7B
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#define UB1_REG_INTF_CONFIG6 0x7C
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// User Bank 2
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#define UB2_REG_ACCEL_CONFIG_STATIC2 0x03
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#define UB2_REG_ACCEL_CONFIG_STATIC3 0x04
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#define UB2_REG_ACCEL_CONFIG_STATIC4 0x05
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// break
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#define UB2_REG_XA_ST_DATA 0x3B
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#define UB2_REG_YA_ST_DATA 0x3C
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#define UB2_REG_ZA_ST_DATA 0x3D
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// User Bank 4
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#define UB4_REG_APEX_CONFIG1 0x40
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#define UB4_REG_APEX_CONFIG2 0x41
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#define UB4_REG_APEX_CONFIG3 0x42
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#define UB4_REG_APEX_CONFIG4 0x43
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#define UB4_REG_APEX_CONFIG5 0x44
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#define UB4_REG_APEX_CONFIG6 0x45
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#define UB4_REG_APEX_CONFIG7 0x46
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#define UB4_REG_APEX_CONFIG8 0x47
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#define UB4_REG_APEX_CONFIG9 0x48
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// break
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#define UB4_REG_ACCEL_WOM_X_THR 0x4A
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#define UB4_REG_ACCEL_WOM_Y_THR 0x4B
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#define UB4_REG_ACCEL_WOM_Z_THR 0x4C
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#define UB4_REG_INT_SOURCE6 0x4D
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#define UB4_REG_INT_SOURCE7 0x4E
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#define UB4_REG_INT_SOURCE8 0x4F
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#define UB4_REG_INT_SOURCE9 0x50
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#define UB4_REG_INT_SOURCE10 0x51
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// break
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#define UB4_REG_OFFSET_USER0 0x77
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#define UB4_REG_OFFSET_USER1 0x78
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#define UB4_REG_OFFSET_USER2 0x79
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#define UB4_REG_OFFSET_USER3 0x7A
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#define UB4_REG_OFFSET_USER4 0x7B
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#define UB4_REG_OFFSET_USER5 0x7C
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#define UB4_REG_OFFSET_USER6 0x7D
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#define UB4_REG_OFFSET_USER7 0x7E
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#define UB4_REG_OFFSET_USER8 0x7F
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// BANK 1
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// #define GYRO_CONFIG_STATIC2 0x0B
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#define GYRO_NF_ENABLE 0x00
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#define GYRO_NF_DISABLE 0x01
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#define GYRO_AAF_ENABLE 0x00
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#define GYRO_AAF_DISABLE 0x02
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// BANK 2
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// #define ACCEL_CONFIG_STATIC2 0x03
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#define ACCEL_AAF_ENABLE 0x00
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#define ACCEL_AAF_DISABLE 0x01
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#define gyrX() _gyr[0]
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#define gyrY() _gyr[1]
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#define gyrZ() _gyr[2]
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#define gyrX1() _gyr1[0]
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#define gyrY1() _gyr1[1]
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#define gyrZ1() _gyr1[2]
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#define accX() _acc[0]
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#define accY() _acc[1]
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#define accZ() _acc[2]
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#define accX1() _acc1[0]
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#define accY1() _acc1[1]
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#define accZ1() _acc1[2]
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#define X_AXIS 0
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#define Y_AXIS 2
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#define Z_AXIS 4
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#define GYRO 0
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#define ACCEL 1
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#define ALL 5
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#define FSR_0 0
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#define FSR_1 1
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#define FSR_2 2
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#define FSR_3 3
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#define FSR_4 4
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#define FSR_5 5
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#define FSR_6 6
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#define FSR_7 7
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#define ODR_32KHZ 1
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#define ODR_16KHZ 2
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#define ODR_8KHZ 3
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#define ODR_4KHZ 4
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#define ODR_2KHZ 5
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#define ODR_1KHZ 6
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#define ODR_200HZ 7
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#define ODR_100HZ 8
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#define ODR_50HZ 9
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#define ODR_25KHZ 10
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#define ODR_12_5KHZ 11
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#define ODR_6_25KHZ 12
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#define ODR_3_125HZ 13
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#define ODR_1_5625HZ 14
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#define ODR_500HZ 15
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/**
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* @struct sAccelConfig0_t
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* @brief Register:Accel_Config0
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* @n -------------------------------------------------------------------------------------------------------------------------------------- -------------------
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* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n | ACCEL_FS_SEL | Reserved | ACCEL_ODR |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n ACCEL_FS_SEL :Full scale select for accelerometer UI interface output
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* @n 000: <20><>16g (default)
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* @n 001: <20><>8g
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* @n 010: <20><>4g
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* @n 011: <20><>2g
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* @n 100: Reserved
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* @n 101: Reserved
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* @n 110: Reserved
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* @n 111: Reserved
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* @n ACCEL_ODR :Accelerometer ODR selection for UI interface output
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* @n 0000: Reserved
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* @n 0001: 32kHz (LN mode)
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* @n 0010: 16kHz (LN mode)
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* @n 0011: 8kHz (LN mode)
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* @n 0100: 4kHz (LN mode)
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* @n 0101: 2kHz (LN mode)
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* @n 0110: 1kHz (LN mode) (default)
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* @n 0111: 200Hz (LP or LN mode)
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* @n 1000: 100Hz (LP or LN mode)
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* @n 1001: 50Hz (LP or LN mode)
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* @n 1010: 25Hz (LP or LN mode)
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* @n 1011: 12.5Hz (LP or LN mode)
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* @n 1100: 6.25Hz (LP mode)
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* @n 1101: 3.125Hz (LP mode)
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* @n 1110: 1.5625Hz (LP mode)
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* @n 1111: 500Hz (LP or LN mode)
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*/
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typedef struct {
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uint8_t accelODR: 4;
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uint8_t reserved: 1;
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uint8_t accelFsSel: 3;
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} __attribute__ ((packed)) sAccelConfig0_t;
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/**
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* @struct sGyroConfig0_t
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* @brief Register:Gyro_Config0
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* @n -------------------------------------------------------------------------------------------------------------------------------------- -------------------
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* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n | GYRO_FS_SEL | Reserved | GYRO_ODR |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n GYRO_FS_SEL : Full scale select for gyroscope UI interface output
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* @n 000: <20><>2000dps (default)
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* @n 001: <20><>1000dps
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* @n 010: <20><>500dps
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* @n 011: <20><>250dps
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* @n 100: <20><>125dps
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* @n 101: <20><>62.5dps
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* @n 110: <20><>31.25dps
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* @n 111: <20><>15.625dps
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* @n GYRO_ODR :Gyroscope ODR selection for UI interface output
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* @n 0000: Reserved
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* @n 0001: 32kHz
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* @n 0010: 16kHz
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* @n 0011: 8kHz
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* @n 0100: 4kHz
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* @n 0101: 2kHz
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* @n 0110: 1kHz (default)
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* @n 0111: 200Hz
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* @n 1000: 100Hz
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* @n 1001: 50Hz
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* @n 1010: 25Hz
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* @n 1011: 12.5Hz
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* @n 1100: Reserved
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* @n 1101: Reserved
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* @n 1110: Reserved
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* @n 1111: 500Hz
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*/
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typedef struct {
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uint8_t gyroODR: 4;
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uint8_t reserved: 1;
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uint8_t gyroFsSel: 3;
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} __attribute__ ((packed)) sGyroConfig0_t;
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/**
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* @struct sAccelConfig1_t
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* @brief Register:Accel_Config1
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* @n -------------------------------------------------------------------------------------------------------------------------------------- -------------------
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* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n | Reserved | ACCEL_UI_FILT_ORD | ACCEL_DEC2_M2_ORD | Reserved |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n ACCEL_UI_FILT_ORD : Selects order of ACCEL UI filter
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* @n 00: 1st Order
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* @n 01: 2nd Order
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* @n 10: 3rd Order
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* @n 11: Reserved
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* @n ACCEL_DEC2_M2_ORD : Order of Accelerometer DEC2_M2 filter
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* @n 00: Reserved
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* @n 01: Reserved
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* @n 10: 3rd order
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* @n 11: Reserved
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*/
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typedef struct {
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uint8_t reserved: 1;
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uint8_t accelDec2M2ORD: 2;
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uint8_t accelUIFiltORD: 2;
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uint8_t reserved2: 3;
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} __attribute__ ((packed)) sAccelConfig1_t;
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/**
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* @struct sGyroAccelConfig0_t
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* @brief Register:Gyro_Accel_Config0
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* @n -------------------------------------------------------------------------------------------------------------------------------------- -------------------
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* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n | ACCEL_UI_FILT_BW | GYRO_UI_FILT_BW |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n ACCEL_UI_FILT_BW : Bandwidth for Accel LPF
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* @n LN Mode:
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* @n 0 BW=ODR/2
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* @n 1 BW=max(400Hz, ODR)/4 (default)
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* @n 2 BW=max(400Hz, ODR)/5
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* @n 3 BW=max(400Hz, ODR)/8
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* @n 4 BW=max(400Hz, ODR)/10
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* @n 5 BW=max(400Hz, ODR)/16
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* @n 6 BW=max(400Hz, ODR)/20
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* @n 7 BW=max(400Hz, ODR)/40
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* @n 8 to 13: Reserved
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* @n 14 Low Latency option: Trivial decimation @ ODR of Dec2 filter output. Dec2
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* @n runs at max(400Hz, ODR)
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* @n 15 Low Latency option: Trivial decimation @ ODR of Dec2 filter output. Dec2
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* @n runs at max(200Hz, 8*ODR)
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* @n LP Mode:
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* @n 0 Reserved
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* @n 1 1x AVG filter (default)
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* @n 2 to 5 Reserved
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* @n 6 16x AVG filter
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* @n 7 to 15 Reserved
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* @n GYRO_UI_FILT_BW :Bandwidth for Gyro LPF
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* @n LN Mode:
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* @n 0 BW=ODR/2
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* @n 1 BW=max(400Hz, ODR)/4 (default)
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* @n 2 BW=max(400Hz, ODR)/5
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* @n 3 BW=max(400Hz, ODR)/8
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* @n 4 BW=max(400Hz, ODR)/10
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* @n 5 BW=max(400Hz, ODR)/16
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* @n 6 BW=max(400Hz, ODR)/20
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* @n 7 BW=max(400Hz, ODR)/40
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* @n 8 to 13: Reserved
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* @n 14 Low Latency option: Trivial decimation @ ODR of Dec2 filter output. Dec2 runs at max(400Hz, ODR)
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* @n 15 Low Latency option: Trivial decimation @ ODR of Dec2 filter output. Dec2 runs at max(200Hz, 8*ODR)
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*/
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typedef struct {
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uint8_t gyroUIFiltBW: 4;
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uint8_t accelUIFiltBW: 4;
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} __attribute__ ((packed)) sGyroAccelConfig0_t;
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/**
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* @struct sGyroConfig1_t
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* @brief Register:Gyro_Config1
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* @n -------------------------------------------------------------------------------------------------------------------------------------- -------------------
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* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n | TEMP_FILT_BW | reserved | GYRO_UI_FILT_ORD | GYRO_DEC2_M2_ORD |
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* @n ----------------------------------------------------------------------------------------------------------------------------------------------------------
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* @n TEMP_FILT_BW : Set the bandwidth of the temperature signal DLPF
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* @n 000: DLPF BW = 4000Hz; DLPF Latency = 0.125ms (default)
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* @n 001: DLPF BW = 170Hz; DLPF Latency = 1ms
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* @n 010: DLPF BW = 82Hz; DLPF Latency = 2ms
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* @n 011: DLPF BW = 40Hz; DLPF Latency = 4ms
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* @n 100: DLPF BW = 20Hz; DLPF Latency = 8ms
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* @n 101: DLPF BW = 10Hz; DLPF Latency = 16ms
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* @n 110: DLPF BW = 5Hz; DLPF Latency = 32ms
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* @n 111: DLPF BW = 5Hz; DLPF Latency = 32ms
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* @n GYRO_UI_FILT_ORD :Selects order of GYRO UI filter
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* @n 00: 1st Order
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* @n 01: 2nd Order
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* @n 10: 3rd Order
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* @n 11: Reserved
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* @n GYRO_DEC2_M2_ORD :Selects order of GYRO DEC2_M2 Filter
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* @n 00: Reserved
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* @n 01: Reserved
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* @n 10: 3rd Order
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* @n 11: Reserved
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*/
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typedef struct {
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uint8_t gyroDec2M2ODR: 2;
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uint8_t gyroUIFiltODR: 2;
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uint8_t reserved: 1;
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uint8_t agyroFiltBW: 3;
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} __attribute__ ((packed)) sGyroConfig1_t;
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/**
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* @struct sAccelConfigStatic4_t
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* @brief Register:Accel_Config_Static4
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* @n -------------------------------------------------------------------------------------------------------------------------------------- --------------------------------------------------
|
||
* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n | ACCEL_AAF_BITSHIFT | ACCEL_AAF_DELTSQR[11:8] |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n ACCEL_AAF_BITSHIFT Controls bandwidth of the accelerometer anti-alias filter
|
||
* @n ACCEL_AAF_DELTSQR[11:8] Controls bandwidth of the accelerometer anti-alias filter
|
||
*/
|
||
typedef struct {
|
||
uint8_t accelAAFDeltsqr: 4;
|
||
uint8_t accelAAFBitshift: 4;
|
||
} __attribute__ ((packed)) sAccelConfigStatic4_t;
|
||
|
||
|
||
/**
|
||
* @struct sAccelConfigStatic2_t
|
||
* @brief Register:Accel_Config_Static2
|
||
* @n -------------------------------------------------------------------------------------------------------------------------------------- --------------------------------------------------
|
||
* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n | Reserved | ACCEL_AAF_DELT | ACCEL_AAF_DIS |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n ACCEL_AAF_DELT Controls bandwidth of the accelerometer anti-alias filter
|
||
* @n ACCEL_AAF_DIS 0: Enable accelerometer anti-aliasing filter (default)
|
||
* @n 1: Disable accelerometer anti-aliasing filter
|
||
*/
|
||
typedef struct {
|
||
uint8_t accelAAFDis: 1;
|
||
uint8_t accelAAFDelt: 6;
|
||
uint8_t reserved: 1;
|
||
} __attribute__ ((packed)) sAccelConfigStatic2_t;
|
||
|
||
|
||
/**
|
||
* @struct sGyroConfigStatic2_t
|
||
* @brief Register:Gyro_Config_Static2
|
||
* @n -------------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------
|
||
* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|
||
* @n ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n | Reserved | GYRO_AAF_DIS | GYRO_NF_DIS |
|
||
* @n ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n GYRO_AAF_DIS :0: Enable gyroscope anti-aliasing filter (default)
|
||
* @n 1: Disable gyroscope anti-aliasing filter
|
||
* @n GYRO_NF_DIS 0: Enable Notch Filter (default)
|
||
* @n 1: Disable Notch Filter
|
||
*/
|
||
typedef struct {
|
||
uint8_t gyroNFDis: 1;
|
||
uint8_t gyroAAFDis: 1;
|
||
uint8_t reserved: 6;
|
||
} __attribute__ ((packed)) sGyroConfigStatic2_t;
|
||
|
||
|
||
/**
|
||
* @struct sGyroConfigStatic5_t
|
||
* @brief Register:Gyro_Config_Static5
|
||
* @n -------------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------
|
||
* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|
||
* @n ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n | GYRO_AAF_BITSHIFT | GYRO_AAF_DELTSQR[11:8] |
|
||
* @n ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n GYRO_AAF_BITSHIFT :Controls bandwidth of the gyroscope anti-alias filter
|
||
* @n GYRO_AAF_DELTSQR[11:8] Controls bandwidth of the gyroscope anti-alias filter
|
||
*/
|
||
typedef struct {
|
||
uint8_t gyroAAFDeltsqr: 4;
|
||
uint8_t gyroAAFBitshift: 4;
|
||
} __attribute__ ((packed)) sGyroConfigStatic5_t;
|
||
|
||
|
||
|
||
/**
|
||
* @struct sGyroConfigStatic9_t
|
||
* @brief Register:Gyro_Config_Static9
|
||
* @n -------------------------------------------------------------------------------------------------------------------------------------- --------------------------------------------------
|
||
* @n | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n | Reserved | GYRO_Z_NF_COSWZ_SEL[0] | GYRO_Y_NF_COSWZ_SEL[0] | GYRO_X_NF_COSWZ_SEL[0] | GYRO_Z_NF_COSWZ[8] | GYRO_Y_NF_COSWZ[8] | GYRO_X_NF_COSWZ[8] |
|
||
* @n -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||
* @n GYRO_Z_NF_COSWZ_SEL[0] :Used for gyroscope Z-axis notch filter frequency selection
|
||
* @n GYRO_Y_NF_COSWZ_SEL[0] :Used for gyroscope Y-axis notch filter frequency selection
|
||
* @n GYRO_X_NF_COSWZ_SEL[0] :Used for gyroscope X-axis notch filter frequency selection
|
||
* @n GYRO_Z_NF_COSWZ[8] :Used for gyroscope Z-axis notch filter frequency selection
|
||
* @n GYRO_Y_NF_COSWZ[8] :Used for gyroscope Y-axis notch filter frequency selection
|
||
* @n GYRO_X_NF_COSWZ[8] :Used for gyroscope X-axis notch filter frequency selection
|
||
*/
|
||
typedef struct {
|
||
uint8_t gyroNFCoswzX8: 1;
|
||
uint8_t gyroNFCoswzY8: 1;
|
||
uint8_t gyroNFCoswzZ8: 1;
|
||
uint8_t gyroNFCoswzSelX: 1;
|
||
uint8_t gyroNFCoswzSelY: 1;
|
||
uint8_t gyroNFCoswzSelZ: 1;
|
||
uint8_t reserved:2;
|
||
} __attribute__ ((packed)) sGyroConfigStatic9_t;
|
||
|
||
|
||
enum GyroFS{
|
||
dps2000 = 0x00,
|
||
dps1000 = 0x01,
|
||
dps500 = 0x02,
|
||
dps250 = 0x03,
|
||
dps125 = 0x04,
|
||
dps62_5 = 0x05,
|
||
dps31_25 = 0x06,
|
||
dps15_625 = 0x07
|
||
};
|
||
|
||
enum AccelFS{
|
||
gpm16 = 0x00,
|
||
gpm8 = 0x01,
|
||
gpm4 = 0x02,
|
||
gpm2 = 0x03
|
||
};
|
||
|
||
|
||
extern float _acc[3];
|
||
extern float _gyr[3];
|
||
extern float _acc1[3];
|
||
extern float _gyr1[3];
|
||
extern float _accelScale;
|
||
extern float _gyroScale;
|
||
|
||
|
||
int ICM42688Begin(void);
|
||
int ICM42688_readRegisters(uint8_t subAddress, uint8_t* dest,uint8_t len);
|
||
void ICM42688_Init(void);
|
||
int getAGT(void);
|
||
|
||
#endif
|
||
|
||
|
||
|